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Electronic Power Supply ,Switchers, Converters and low frequency Circuits, Content:

 

Open loop for Switching regulators for powersupplys

The closed loop stability of switching regulators is not easy to get. Especially if the stability requirement of the output voltage is below 1%. One can overcome this problem by using an open loop, witch controls then the most of the output voltage deviations. This then allows to reduce the feedback gain at  a value below ringing of the loop. Figure 1 shows the circuit of a typical switcher with a closed- loop-amplifier F including stability networks, current feedback and circuits. The pulswith is produced by means of a saw tooth voltage having an amplitude of Vz. The amplitude of this saw tooth voltage now is controlled from the input voltage via a correction amplifier A. The result is a constant output voltage, even without a closed loop. The closed loop gain can be reduced and stability problems are minimized.

   Figure 1 Switching regulator with open loop
                      Fig. 2 Equations of switcher open loop

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Ripple-regulator reduces busripple without electrolytes

Electrolytes are the big reliability problem in power conditioners. If the frequency of the produced ripple is high enough to be filtered with plastic-capacitors, the problem is solved. But in some cases, this capacitors are to big and/or not useful at higher temperatures. A ripple regulator may be solve this problem. The ripple regulator is a voltage regulator working only from the AC on the output bus. The feedback must therefore be fast enough to regulate the ripple to minimum. A switching or big analog-transistor is not necessary to run a ripple regulator. A little transformer driven by a small transistor, will do the job. If the inrush current of the to the output is controlled, a very small transistor can be used too. C1 and C2 are SMD-high frequency despiking capacitors. The loop of the feedback must be fast enough to regulate the ripple frequency. A feedback network has to be used to ensure stability. Fig. 1 shows a tested circuit for a 3A/12V-switcher having an output-ripple of 20 kHz. The ripple was reduced by a factor of 500 using a E16 high my-core.The same circuit can reduce 50 Hz  ripple from simple oversupplies without big ripple-capacitors .The ripple transformer then becomes relatively large, but can encounter very high temperatures.

 

Fig. 1 Ripple-regulator

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Fast switcher power cells FSC for communication power supplys

A new generation of power supply switchers is presented. This switchers are based on the electronic programming of several pulses to switch power switches on and off. The function of the programming is mathematically correlated to requirements of a powercell.The basic function is explained in Fig.1 showing the difference between regular power switches as buck, buck boost , boost or venable .The regular switcher has on and off time where the mathematical relation between both is simple only the difference between both ,whereas the sum of both times is the switcher period. The FSC switcher has tree switches and tree switching times. The sum of the three times is the switcher period . The three times are somehow programmed mathematically by an equation or by means of an electronic device.Fig.2  

Fig.1 Usual switcher timing

 

 

 

 

 

To get such a switcher run, we must first find a circuit which combines the classical buck and the boost mode.The result is shown in Fig.2.The Function is as follows: We find 2 electronic switches, S1 and S2. S1 closed, led the charching current I1 flow through L/x. S1 open and S2 closed is the boost discharching mode .The coil decharching current from L/y  is I2 . The energy in the inductor is added to the battery voltage and we get Va > Uo. If both switches are open , the decharching is continued from L via D1 and I3. This is equivalent to the Buck mode and we get Ua<Uo. In a balanced condition where the regulator feedback is closed, the coil will never be decharched completely . Now we look to the Current trough the inductance during the whole cycle. Fig.3

Fig.2 The PST buck boost regulator

 

 

 

 

 

A simple mathematical relation is a factor k.Then we get the following simple time relations:

  • S1 on during the time : 
  • S2 on during the time : 
  • S1 and S2 off :           

                                                       Fig.3 Balanced coil current

We get the static equation setting the changing currents to zero:

                                                           Fig.4 static equitions

                  

If we want watch the dynamic behavior, we decrease the control pulse t1 very hard with a negative time jump .The result is a time jump on each of  the three switcher times .Fig.6 shows the result at Io. As the time period T is constant, we get a current increase delta I. Fig.7 This increase in current versus time , shows the actual switcher speed. Now we compare this current increase to an virtual single analog coil Fig.8 and can compute the analog voltage regulator transmission F(s) of the power cell ,Fig.9 , to optimize the regulator loop.
                        Fig.5 Frequency response of the power cell
                      Fig.6 Computing of the virtual analog inductance of the power cell

This result shows , that the new power cell is very fast reacting to distortions, that means, that the closed loop will counteract very fast too load jumps as it my happen in a communication system using switched power amplifier channels .Under this conditions, a slow switcher regulator my produce dangerous voltage overshoots. By means of the inductance Lo , we can certain the analog regulator control circuit of Fig.9 which is a normal low pass as usual . Vin here is the input feedback voltage to compute F(s), not the DC input.
Fig.7 Equivalent analog circuit

Fig.8 Computing corner frequency and roll off                                                                             

This power cell is only a example of dozens of possible new switcher cells. The last Fig. 9 shows a series of new power cells and their equitions.>>> coming

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The Frequency behavior of the Power Supply Boost Switcher Power Cell

Due of its simplicity and its very high efficiency of almost 100 % , the original boost switcher is very popular. But the closed loop behavior is not as easy . To realize it in a high gain loop, some circuitry is necessary to get stability. First is to know the analog transmission behavior of the boost power cell of Fig.1. The control transmission is the path of the pulswith ton / T to the output voltage Vout. As the feedback control loop is analog, we must find a analog  model for the power cell feedback transmission. As the equations at Fig.2 shows  the control transmission is depending on the working point of the power cell, that means the input voltage value. The given transmission formula can be directly used in an analog bode consideration as F(s) using Fig.3. What we find here is at least a roll off of -20 db and a damping factor which is important for stability  depending on all components. That means to get the switcher stable, the values of all components must be proper selected. Further it is obvious, that the losses of the charging capacitor produce a positive loop phase.Therefore the capacitor loss stray values, must be carefully watched.

Fig.1 Booster power cell

 Fig.3 Analog Feedback Block

Fig.2 Equations of the booster

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The Frequency behavior of the Power Supply Buck Switcher Power Cell

The most used power supply switcher cell is the buck switcher. This circuit is simple and robust, and so is the frequency behavior if used in a feedback loop. Link to feedback formulas

The well known buck switcher cell circuit is shown at Fig.1. The power switch is continuously switched on during the on time ton. The Question now is, what will happen, if ton varies a small amount at different frequencies. A balance current consideration leads to the result of Fig.2. which indicates, the regulator block of the buck cell is a low pass equal to the switcher circuit of Fig.1. having a steady state pulswith ton / T and Lanalog = L, see Fig.3

 

 

 

 

             Fig.1 Classical Buck Power cell                                         Fig.3 Analog Regulator block of Buck cell

Fig.2 Loop frequency behavior of the Buck cell

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How to regulate the classical push pull converter

The circuit of the classical push pull converter using two switches and a transformer is almost 60 Yeahrs old and still used today. Fig1. remembers the function: Two Power switches S1 and S2 have the push pull modes on and off and drive a transformer with a rectangle power . A simple coil improves it to a boost regulator if we overlap the two switches for a variable short time. during this time, where both switches are on the transformer is canceled, and an inductance is loaded on the input voltage. Its energy is added to the output during the push pull mode.

Fig.1 Classical push pull converter.         Fig.2 regulated pus pull converter

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Combine buck and boost power cells, to optimize efficiency

Wide regulation switchers, have the problem of low efficiency at the end of the input voltage range.This decrease can be up to 10 % of the maximum efficiency. The combination of different power cells can overcome this problem. If for instance a boost cell runs at the lower values of the input voltage range, and the buck mode runs at the lower input voltage, one can get an efficiency as Fig.1  shows. But combining two different cell types may be a problem.I propose to combine the cells by means of the electronic control circuitry. If we divide the saw tooth voltage of the puls modulating circuit in two parts , switching the clock frequency between buck and boost mode, the power mode will automatically change at the midst of the input voltage range.The circuit is shown at Fig.2. We see the 2 buck switches directly connected to the voltage input. The boost switches are connected to the output transformer.The coil L is used in both modes. D is the freewheel diode necessary in the buck mode.The two boost transistors act as push pull switches for the  transformator. In the boost mode, the switches are both in the on condition, what cancels the transformer off. The buck switches are saturated  and the coil L is charched with the input voltage.The clock is divided using a toggle flip flop to drive the different cells via NOR logic devices.

 

 

 

 

 

 

Fig.1 Efficiency of Buck and Boost combined cells.

 

 

 

 

Fig.2 Logical circuit, combining buck and boost cells.

 

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Regulated High Voltage DC Converter has low output ripple

Normally, a regulated DC Converter is controlled changing the duty cycle between inductor charching and discharching mode. During the charching mode of the coil, the energy on the output is derived  from an energy storage capacitor.This usual way of regulating, leads to a certain amount of ripple on the output voltage. In low output voltage converters, this ripple can be easily reduced . But if the output voltage is  in the kV-range, the ripple filters are voluminous and unreliable. A bridge converter power cell, can be modified to work as pumping converter controlled from a duty cycle change, whereas the output duty cycle is constant. Excessive energy in a charging inductor is pumped back to the input voltage source. In using this circuit, the ripples on the output are reduced to very small spikes even during primary duty cycle variations. An other advantage is the increase of the feedback control speed, because no ripple must be filtered out in the loop circuitry.

                                                                                                                                                                                                       Fig.1 Pumping bridge converter

Lets look  first to the circuit of the bridge converter at Fig1. We have the output transformer Tr1, the switches S1, S2, S3, S4, and the energy back transformer Tr2 and two pumping coils L1 and L2. The switches S3 and S4 are periodically switched with a duty cycle of 1:1, whereas the switches S1 and S2 get time variation control pulses. Fig.2. They switch the load via the transformer Tr.1 during charching and decharching of the coils, that means energy is transferred to the output at the time where energy is pumped from and back of  the source Vin.                                                                 .

           Fig.2 Bridge converter drive diagram                                  

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Combine push  pull and bridge converter as pulswith regulator

As the regulated pumping bridge converter of the above circuit needs a lot of components , I try to simplify this bridge converter into a combination of bridge and push pull converter. The output transformer will have two more windings having less turns then the main primary winding. If we change the power switches between the different primary windings, we get a buck boost converter with tree different charching times of a energy storage coil L. The result is the same as above, constant duty cycle for the output voltage. Fig.1 shows the circuit. The switch timing is somewath different from Fig.2.  If  I will find the time, the timing of the switches will be calculated and  the time to voltage control formula from the balanced currents in the coil L shown.

                                                             Fig.3 Regulated Push pull bridge converter

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Regulated DC-Bridge Converters in Buck Mode

Classical Bridge DC to DC Converters are not regulated. But due of their four switches, they are excellent configurations to be pulswith regulated in many configurations. Sure an energy inductance is necessary, where the energy is stored stored , transformed and somehow brought back into the current cyclus. Either back to the battery or to the output. If it pumped to the output there are two possibilities, either the coil energy is added as parallel current (buckmode) or added as series voltage (boostmode). Here are three pulswith controlled Bridge Converter Circuits which work in the buck mode. Fig.1 shows a controlled bridge converter with center tapped output transformer, where the buck current flows from the energie storage coil L via D2. D2 only is a despiking diode.The output voltage equation is the same as in a conventional buck freewheel converter: Uout / Uin = (ton / T) r ; Fig.2 shows the switching diagram. It is obvious, that the transformer is periodically switched to the input voltage via S1 / S2 and S3/S4. During this time, L is loated.The discharging of the Coil then comes in the push pull mode versus S1 and S3.

Fig.1 Buck regulated bridge converter 1

Fig.2 Switch drive of the regulated bridge converter 1

An other circuit is shown at Fig.3. Here are the push pull windings on the storage coil, not on the transformer.This simplifies the transformer . In doing so, the digital drive must be diffrend. Fig.4

 In an other circuit, the complexity of transformer and coil is reduced, using the primary winding of the transformer T for energy injection by means of better circuitry. Fig5 In this circuit, the same digital drive as in Fig.2 is valid. S1 and S4 are used, to switch the discharge energie of the coil into the the output transformer.

Fig.4 Digital drive of Fig.2 and 5

Fig.3 Buck regulated Bridge converter 2                            Fig.5 Simplified buck regulated bridge converter 3.

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A Phase regulated kW DC-Converter

Phase regulation in a DC Converter is a practical and helpful method to distribute the input DC Power in into paralleled DC-Converters, consisting of small and cheap switching transistors. Such regulated DC converters have a very high efficiency because, the used unregulated push pull converters can have an optimal eta of > 95% . Fig.1 shoes a block diagram of a phase regulated 2kW-DC-Converter, using two standard push pull converters, where the drive voltages of the power switches are shifted in phase as function of the feedback-control-voltage.The Square wave voltages of the converters are added by means of a power transformer. Fig.2 shows the output AC voltage (blue). The DC-Voltage, must be stored in a buck switcher L-C-Diode circuit. This circuit will decrease the efficiency a few percent. Total efficiency is about 93%: The buck storage formula is valid there, but due of the voltage adding, the ripple frequency is twice the converter frequency, which eases ripple filtering. The phase control is easy to realize, using standard logic circuitry. One converter is driven directly from the square wave clock. This Clock produces a saw tooth too. The control DC- Voltage and the saw tooth create a pulswith controlled voltage , which triggers a toggle flip flop which creates a new phase depended 1:1 square wave

Fig.1 Phase regulated DC- Converter

         Fig.2 AC-Output voltage

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Transmission of Sample and Hold

As it is well known, a sample and hold takes signal probes and keeps the amplitude of this probe constant until the next sample peak. Fig.1 To use this circuit in a feedback of a power supply, one has to know  the amount of negative phase the sample and hold will produce in a loop. As the S+H is periodically switched, periodically Phase jumps of 180 degree appear at the multiple of the sample frequency. Fig.2 Whereas the Gain has a slope of -20 DB / Dec.

                                                                                           Fig.1 Sample and Hold Probes

Fig.2 S+H Gain and Phase

 

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Sample and Hold improves Switcher Loop

Feedback loops in general , power supplies or some other analog regulation loops, must be cleaned from ripples, fast distortions and short time disturbances.This is not really part of the necessary system loop, but an important part for the electronic loop circuits . Normally little low passes or integrator circuits are used to cut the ripples off. But this circuits will produce negative phases up to 90 degree in a loop and deteriorate loop quality. To avoid this negative phase, a sample and hold can be used instead. Sure the sample and hold produces negative phase too, but the total loop phase test will show an improved  loop condition. Regulation using Sample and Hold in the Feedback and digital software is called DDC (Direct Digital Control), but in this application, the sample and hold is used in the analog feedback part of a switcher power supply loop. If the sampling frequency is chosen to be 10 times the power supply ripple frequency, the negative phase in the loop due of S+H may be only -10 degree. The saving of  Phase due of  the S+H can improve the stability of the regulator and its reaction speed..

Example: A switching regulator output has 500 mV ripple. After dividing it with a resistor loop divider, the ripple is 250mV. The circuit sensitivity of the regulator is limited due of gain and latching effects, to 20 mV. Necessary damping of the ripple d = 20dB. A 20 dB first Order low pass is useful to damp this ripple. The green lines of Fig. show the gain and the phase of this low pass.The additional negative phase for the loop  is 10 to 25 degree.Using a sample and hold instead of a low pass, the negative phase will be only 0 to 10 degree. This makes it possible, to make the regulator 5 times faster using a sample and hold.

Fig. 1 First order low pass compared with a sample and hold

 

 

 

 

 

 

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 How to build a failsave DC- Switch

Single transistor DC-power electronic switches my fail, and stop the car, the train or their control circuitry during traffic control.This may lead to terrible events.To prevent such live important failures, the single transistor switch may be replaced by an quad switch, designed for space applications. Quad means, we use two power transistors in series and the same arrangement  as an paralleled path. So we have four useful transistors. See Fig.1. This design is redundant for short and open failure. To drive the bases of the power switches, we use transistor series circuits too. Now wee see, at least two transistors must fail to get malfunction .The control voltage must be able, to supply 7 transistors bases  even in case of base breakdown. As I have designed this switch in the seventies npn transistors have been used, but as this  is only an example of redundant circuitry, modern MOS devices may be used instead

 

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Fig.1 Quad DC.switch

 

A high Power Latching Relais Driver for Wave-guide Switches

Latching Relays come out in different sizes, they have two switching magnets, which changes status by means of two coils. Two change the status a short time drive current must be flow through one of the status coils.  In case of a system voltage loss, latching relays keep its position, without any power. There fore, they are a good solution to replace storage elements in electronic equipment’s to prevent standby power. Small latching relays can be driven directly from an triggered mono stable Integrated Circuit. In case of a bigger Relay, driver transistors are necessary. To prevent a separate power supply in 12/24/48 Volt circuits, to feed the Integrated circuits, the latching relays driver transistor can be used to produce a switching impulse. Fig 1 shows a driver circuit used to switch a 24 Volt Wave-guide latching switch.This driver is very robust and may be used in traffic electronics too.

                                                       Fig.1 Wave-guide Latching relays driver

To change the Relays status from A to B, the switch S is set to B. The decharching path R2 of C1 then is opened and C1 is recharched via the Base of T2. Due of this, the relay goes to B and the shorted T2 decharches C2 and opens T4, blocking T3 and A. In case S is on A, the function is vice verca.To prevent malfunction at higher temperatures, the leakage current of C1/C2 must be kept low.

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   RTL-Logic improves reliability in Power Supply’s

Power supply's sometimes need logic circuits. Of course at low voltage supply’s, we use  the customary IC’s. But for high Voltage supply’s sometimes is it more reliable to use simple RTL logic and make their circuit a direct part of the Power supply circuit. Here are a few classic RTL circuits to improve the reliability of  Power supply’s for traffic or space applications. 

Fig.1 Classical RTL logic circuits

#1

 

NAND

A

B

out

1

1

0

1

0

1

0

1

1

0

0

1

#2

 

NOR

A

B

out

1

1

0

1

0

0

0

1

0

0

0

1

#3

 

NOR

A

B

out

1

1

0

1

0

0

0

1

0

0

0

1

#4

 

NAND

A

B

out

1

1

0

1

0

1

0

1

1

0

0

1

FIG.2 Truth table of RTL logic

 

 

 

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